Core Technology

We are committed to becoming the world's best company in the field of automation equipment.

DRAM Inspection Technology

Utilization of BIOS-level Intel smart built-in self-test (BIST) prevents system drop events while enabling margin testing by changing parameters using BIOS technology with less volume and cost.

DRAM tester based on smart BIST can be used widely
for ATE equipment as it can solve many problems such as test clock rundown of the ATE tester.

Intel CPU Base

FPA offers a highly effective and stable system through a combination of software algorithms and Intel's hardware in the hardware-oriented tester market.

01

Integrate

The same inspection algorithm can be applied to the entire process including components, modules, and burn-in mounting machines.

02

Environment

The parameter margin tests are performed in the same environment as the user with a real memory clock to ensure reliability.

03

Support

Rapid development and support are available with Intel CPU and BIOS to keep up with the latest update of clocks.

04

Test Process

Core Technology

We are committed to becoming the world's best company in the field of automation equipment.

DRAM Inspection Technology

Utilization of BIOS-level Intel smart built-in self-test (BIST) prevents system drop events while enabling margin testing by changing parameters using BIOS technology with less volume and cost.

DRAM tester based on smart BIST can be used widely for ATE equipment as it can solve many problems such as test clock rundown of the ATE tester.

01

02

03

04

PC Booting

DRAM tester based on smart BIST can be used widely
for ATE equipment as it can solve many problems such as test clock rundown of the ATE tester.